1. Field of the Invention
The present invention relates to a digital amplifier, and more particularly, a digital amplifier that has improved power efficiency.
2. Description of the Prior Art
Applications needing high power efficiency usually use a pulse-width-modulation (PWM) signal to drive a class D power amplifier (also known as a digital amplifier) in a following stage. The advantage of such a system is low power dissipation, but the PWM signal is easily interfered with by several non-ideal factors such as power noise. As a result, the PWM signal is distorted.
U.S. Pat. No. 6,768,779 provides a digital amplifier to solve the abovementioned problem; however, the error-correction range of the digital amplifier relates to a delay time. If the delay time is short, the PWM signal cannot be compensated effectively; if the delay time is long, the output signal will be an error. For IC technology, the delay time varies greatly according to the IC fabrication and the operation temperature.